V = R * I
Core DC circuit sizing for voltage, resistance, and current.
G = 1 / R
Relates resistance and conductance in network analysis.
P = V * I
Power dissipation and consumption sizing.
C = Q / V
Capacitor sizing and stored charge estimation.
VL = L * (dI/dt)
Coil modeling and current slew behavior.
Z^2 = R^2 + X^2
Combines resistance and reactance in AC circuits.
Q = C * V
Stored charge in capacitors.
f = 1 / T
Converts period to frequency.
T = 1 / f
Converts frequency to period.
M = Gs + Ga - Ac - At
Link budget margin estimation for RF links.
At = 32.5 + 20*log10(d) + 20*log10(f)
Path loss estimation for RF distance and frequency.
A = Vin / Vout
Input/output ratio in circuits and filters.
A_dB = 20*log10(Vin / Vout)
Voltage attenuation in decibels.
f_c = 1 / (2*pi*R*C)
Cutoff for RC low/high-pass filters.
f0 = 1 / (2*pi*sqrt(L*C))
Resonant frequency in LC band-pass filters.
Q = f0 / BW
Quality factor for LC band-pass filters.
BW = f_alta - f_baixa
Bandwidth between upper and lower cutoff frequencies.
Av = gm * (RD || RL)
FET common gate stage gain.
Av = (RE || RL) / ((RE || RL) + hib)
BJT emitter follower gain.
Av = (RS || RL) / ((RS || RL) + (1/gm))
FET source follower gain.
Av = (RC || RL) / hib
BJT common base gain.
Av = -(RD || RL) / ((1/gm) + RS_ac)
FET common source gain.
Av = -(RC || RL) / (hib + RE_ac)
BJT common emitter gain.
ID = IDSS * (1 - Vgs / Vp)^2
Drain current from JFET transfer curve.
Vgs = Vp * (1 - sqrt(ID / IDSS))
Gate-source voltage from JFET transfer curve.
IDq * Rs + Vp * (1 - sqrt(IDq / IDSS)) = 0
Self-bias Q-point using Shockley equation.
